VGA Core Information

Example Graphics System Configuration

The core has a generic hardware interface to the host interface block and assumes a 64-bit wide DRAM model of the display buffer. It contains a CRT controller, an attribute controller and a VGA graphics controller as shown below. The attribute controller implements a 64 bit wide by 32 deep FIFO for the display data.

Using Weitek's 0.8um triple layer metal process, the VGA core operates at dot clock rates up to 135 MHz and memory clocks up to 40 MHz. The CRTC is capable of reading 64 bits of data every rising edge of memory clock for a peak burst fill rate of 320 Mbytes/sec.

General Block Diagram

The VGA core supports the following additional functionality over the base level IBM VGA:

• Up to 1280x1024 resolution at 8 and 16 bits per pixel and 75Hz refresh rate. Up to 1024x768 resolution at 24 bits per pixel and 75Hz refresh rate. Up to 4MB of memory is supported by the VGA core.
• A pair of banking registers to support accessibility to larger frame buffer space via the 64K VGA address aperture. The banking register can be selected either by cycle type (R/W) or via one bit of the address.
• Support for 132 character wide text screens at 75Hz refresh rate.
• Relocatability of the VGA portion of the frame buffer anywhere in a 4MB frame buffer space.
• Support for interlaced monitors

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